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This book discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies.
Design of Multi-Bit Delta-Sigma A/D Converters
This book discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies.
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167.990000 USD

Design of Multi-Bit Delta-Sigma A/D Converters

by Willy M. C. Sansen, Michiel Steyaert, Yves Geerts
Paperback / softback
Book cover image
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design ...
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers. The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA's behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.
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167.990000 USD

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers

by Michiel Steyaert, Paul LeRoux
Paperback / softback
Book cover image
CMOS Fractional-N Synthesizers starts with a comprehensive introduction to general frequency synthesis. Different architectures and synthesizer building blocks are discussed with their relative importance on synthesizer specifications. The process of synthesizer specification derivation is illustrated with the DCS-1800 standard as a general test case. The book tackles the design of ...
CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration
CMOS Fractional-N Synthesizers starts with a comprehensive introduction to general frequency synthesis. Different architectures and synthesizer building blocks are discussed with their relative importance on synthesizer specifications. The process of synthesizer specification derivation is illustrated with the DCS-1800 standard as a general test case. The book tackles the design of fractional-N synthesizers in CMOS on circuit level as well as system level. The circuit level focuses on high-speed prescaler design up to 12 GHz in CMOS and on fully integrated, low-phase-noise LC-VCO design. High-Q inductor integration and simulation in CMOS is elaborated and flicker noise minimization techniques are presented, ranging from bias point choice to noise filtering techniques. On a higher level, a systematic design strategy has been developed that trades off all noise contributions and fast dynamics for integrated capacitance (area). Moreover, a theoretical DeltaSigma phase noise analysis is presented, extended with a fast non-linear analysis method to accurately predict the influence of PLL non-linearities on the spectral purity of the DeltaSigma fractional-N frequency synthesizers.
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367.490000 USD

CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration

by Michiel Steyaert, Bram de Muer
Hardback
Book cover image
Static and Dynamic Performance Limitations for High Speed D/A Converters discusses the design and implementation of high speed current-steering CMOS digital-to-analog converters. Starting from the definition of the basic specifications for a D/A converter, the elements determining the static and dynamic performance are identified. Different guidelines based on scientific derivations ...
Static and Dynamic Performance Limitations for High Speed D/A Converters
Static and Dynamic Performance Limitations for High Speed D/A Converters discusses the design and implementation of high speed current-steering CMOS digital-to-analog converters. Starting from the definition of the basic specifications for a D/A converter, the elements determining the static and dynamic performance are identified. Different guidelines based on scientific derivations are suggested to optimize this performance. Furthermore, a new closed formula has been derived to account for the influence of the transistor mismatch on the achievable resolution of the current-steering D/A converter. To allow a thorough understanding of the dynamic behavior, a new factor has been introduced. Moreover, the frequency dependency of the output impedance introduces harmonic distortion components which can limit the maximum attainable spurious free dynamic range. Finally, the last part of the book gives an overview on different existing transistor mismatch models and the link with the static performance of the D/A converter.
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209.990000 USD

Static and Dynamic Performance Limitations for High Speed D/A Converters

by Willy M. C. Sansen, Michiel Steyaert, Anne Van den Bosch
Hardback
Book cover image
This book introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified. To validate the presented methodologies, the authors have selected and designed accordingly three different industrial-strength applications.
Systematic Design of Analog IP Blocks
This book introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified. To validate the presented methodologies, the authors have selected and designed accordingly three different industrial-strength applications.
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188.990000 USD

Systematic Design of Analog IP Blocks

by Michiel Steyaert, Georges Gielen, Jan Vandenbussche
Hardback
Book cover image
The world of wireless communications is changing very rapidly since a few years. The introduction of digital data communication in combination with digital signal process ing has created the foundation for the development of many new wireless applications. High-quality digital wireless networks for voice communication with global and local coverage, ...
CMOS Wireless Transceiver Design
The world of wireless communications is changing very rapidly since a few years. The introduction of digital data communication in combination with digital signal process ing has created the foundation for the development of many new wireless applications. High-quality digital wireless networks for voice communication with global and local coverage, like the GSM and DECT system, are only faint and early examples of the wide variety of wireless applications that will become available in the remainder of this decade. The new evolutions in wireless communications set new requirements for the trans ceivers (transmitter-receivers). Higher operating frequencies, a lower power consump tion and a very high degree of integration, are new specifications which ask for design approaches quite different from the classical RF design techniques. The integrata bility and power consumption reduction of the digital part will further improve with the continued downscaling of technologies. This is however completely different for the analog transceiver front-end, the part which performs the interfacing between the antenna and the digital signal processing. The analog front-end's integratability and power consumption are closely related to the physical limitations of the transceiver topology and not so much to the scaling of the used technology. Chapter 2 gives a detailed study of the level of integration in current transceiver realization and analyzes their limitations. In chapter 3 of this book the complex signal technique for the analysis and synthesis of multi-path receiver and transmitter topologies is introduced.
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262.490000 USD

CMOS Wireless Transceiver Design

by Michiel Steyaert, Jan Crols
Paperback / softback
Book cover image
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design ...
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers
LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers. The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA's behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.
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209.990000 USD

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers

by Michiel Steyaert, Paul LeRoux
Hardback
Book cover image
When comparing conventional computing architectures to the architectures of biological neural systems, we find several striking differences. Conventional computers use a low number of high performance computing elements that are programmed with algorithms to perform tasks in a time sequenced way; they are very successful in administrative applications, in scientific ...
Analog VLSI Integration of Massive Parallel Signal Processing Systems
When comparing conventional computing architectures to the architectures of biological neural systems, we find several striking differences. Conventional computers use a low number of high performance computing elements that are programmed with algorithms to perform tasks in a time sequenced way; they are very successful in administrative applications, in scientific simulations, and in certain signal processing applications. However, the biological systems still significantly outperform conventional computers in perception tasks, sensory data processing and motory control. Biological systems use a completely dif ferent computing paradigm: a massive network of simple processors that are (adaptively) interconnected and operate in parallel. Exactly this massively parallel processing seems the key aspect to their success. On the other hand the development of VLSI technologies provide us with technological means to implement very complicated systems on a silicon die. Especially analog VLSI circuits in standard digital technologies open the way for the implement at ion of massively parallel analog signal processing systems for sensory signal processing applications and for perception tasks. In chapter 1 the motivations behind the emergence of the analog VLSI of massively parallel systems is discussed in detail together with the capabilities and !imitations of VLSI technologies and the required research and developments. Analog parallel signal processing drives for the development of very com pact, high speed and low power circuits. An important technologicallimitation in the reduction of the size of circuits and the improvement of the speed and power consumption performance is the device inaccuracies or device mismatch.
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262.490000 USD

Analog VLSI Integration of Massive Parallel Signal Processing Systems

by Michiel Steyaert, Peter Kinget
Hardback
Book cover image
High-Performance CMOS Continuous-Time Filters is devoted to the design of CMOS continuous-time filters. CMOS is employed because the most complex integrated circuits have been realized with this technology for two decades. The most important advantages and drawbacks of continuous-time filters are clearly shown. The transfer function is one of the ...
High-Performance CMOS Continuous-Time Filters
High-Performance CMOS Continuous-Time Filters is devoted to the design of CMOS continuous-time filters. CMOS is employed because the most complex integrated circuits have been realized with this technology for two decades. The most important advantages and drawbacks of continuous-time filters are clearly shown. The transfer function is one of the most important filter parameters but several others (like intermodulation distortion, power-supply rejection ratio, noise level and dynamic range) are fundamental in the design of high-performance systems. Special attention is paid to the practical aspects of the design, which shows the difference between an academic design and an industrial design. A clear understanding of the behavior of the circuits and techniques is preferred over complex equations or interpretation of simulated results. Step-by-step design procedures are very often used to clarify the use of the techniques and topologies. The organization of this text is hierarchical, starting with the design consideration of the basic building blocks and ending with the design of several high-performance continuous-time filters. Most of the circuits have been fabricated, theoretically analyzed and simulated, and silicon measurement results are compared with each other. High-Performance CMOS Continuous-Time Filters can be used as a text book for senior or graduate courses on this topic and can also be useful for industrial engineers as a reference book.
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167.990000 USD

High-Performance CMOS Continuous-Time Filters

by Willy M. C. Sansen, Michiel Steyaert, Jose Silva-Martinez
Paperback / softback
Book cover image
this book is not suitable for the bookstore catalogue
Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS
this book is not suitable for the bookstore catalogue
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178.490000 USD

Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS

by Willy M. C. Sansen, Michiel Steyaert, Libin Yao
Hardback
Book cover image
Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters investigates the feasibility of designing Delta-Sigma Analog to Digital Converters for very low supply voltage (lower than 1.5V) and low power operation in standard CMOS processes. The chosen technique of implementation is the Switched Opamp Technique which provides Switched Capacitor operation at ...
Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters
Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters investigates the feasibility of designing Delta-Sigma Analog to Digital Converters for very low supply voltage (lower than 1.5V) and low power operation in standard CMOS processes. The chosen technique of implementation is the Switched Opamp Technique which provides Switched Capacitor operation at low supply voltage without the need to apply voltage multipliers or low VtMOST devices. A method of implementing the classic single loop and cascaded Delta-Sigma modulator topologies with half delay integrators is presented. Those topologies are studied in order to find the parameters that maximise the performance in terms of peak SNR. Based on a linear model, the performance degradations of higher order single loop and cascaded modulators, compared to a hypothetical ideal modulator, are quantified. An overview of low voltage Switched Capacitor design techniques, such as the use of voltage multipliers, low VtMOST devices and the Switched Opamp Technique, is given. An in-depth discussion of the present status of the Switched Opamp Technique covers the single-ended Original Switched Opamp Technique, the Modified Switched Opamp Technique, which allows lower supply voltage operation, and differential implementation including common mode control techniques. The restrictions imposed on the analog circuits by low supply voltage operation are investigated. Several low voltage circuit building blocks, some of which are new, are discussed. A new low voltage class AB OTA, especially suited for differential Switched Opamp applications, together with a common mode feedback amplifier and a comparator are presented and analyzed. As part of a systematic top-down design approach, the non-ideal charge transfer of the Switched Opamp integrator cell is modeled, based upon several models of the main opamp non-ideal characteristics. Behavioral simulations carried out with these models yield the required opamp specifications that ensure that the intended performance is met in an implementation. A power consumption analysis is performed. The influence of all design parameters, especially the low power supply voltage, is highlighted. Design guidelines towards low power operation are distilled. Two implementations are presented together with measurement results. The first one is a single-ended implementation of a Delta-Sigma ADC operating with 1.5V supply voltage and consuming 100 &mgr;W for a 74 dB dynamic range in a 3.4 kHz bandwidth. The second implementation is differential and operates with 900 mV. It achieves 77 dB dynamic range in 16 kHz bandwidth and consumes 40 &mgr;W. Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters is essential reading for analog design engineers and researchers.
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209.990000 USD

Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters

by Willy M. C. Sansen, Michiel Steyaert, Vincenzo Peluso
Paperback / softback
Book cover image
this book is not suitable for the bookstore catalogue
Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS
this book is not suitable for the bookstore catalogue
https://magrudy-assets.storage.googleapis.com/9789048170579.jpg
167.990000 USD

Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS

by Willy M. C. Sansen, Michiel Steyaert, Libin Yao
Paperback / softback
Book cover image
This book discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies.
Design of Multi-Bit Delta-Sigma A/D Converters
This book discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies.
https://magrudy-assets.storage.googleapis.com/9781402070785.jpg
230.990000 USD

Design of Multi-Bit Delta-Sigma A/D Converters

by Willy M. C. Sansen, Michiel Steyaert, Yves Geerts
Hardback
Book cover image
Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ...) system: the line driver. Traditional Class AB line drivers consume more than 70% of the total power budget of state-of-the-art ADSL modems. This book describes the main difficulties ...
Design and Analysis of High Efficiency Line Drivers for xDSL
Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ...) system: the line driver. Traditional Class AB line drivers consume more than 70% of the total power budget of state-of-the-art ADSL modems. This book describes the main difficulties in designing line drivers for xDSL. The most important specifications are elaborated staring from the main properties of the channel and the signal properties. The traditional (class AB), state-of-the-art (class G) and future technologies (class K) are discussed. The main part of Design and Analysis of High Efficiency Line Drivers for xDSL describes the design of a novel architecture: the Self-Oscillating Power Amplifier or SOPA.
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188.990000 USD

Design and Analysis of High Efficiency Line Drivers for xDSL

by Michiel Steyaert, Tim Piessens
Hardback
Book cover image
This book tackles both high efficiency and high linearity power amplifier (PA) design in low-voltage CMOS. With its emphasis on theory, design and implementation, the book offers a guide for those actively involved in the design of fully integrated CMOS wireless transceivers. Offering mathematical background, as well as intuitive insight, ...
RF Power Amplifiers for Mobile Communications
This book tackles both high efficiency and high linearity power amplifier (PA) design in low-voltage CMOS. With its emphasis on theory, design and implementation, the book offers a guide for those actively involved in the design of fully integrated CMOS wireless transceivers. Offering mathematical background, as well as intuitive insight, the book is essential reading for RF design engineers and researchers and is also suitable as a text book.
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167.990000 USD

RF Power Amplifiers for Mobile Communications

by Michiel Steyaert, Patrick Reynaert
Paperback / softback
Book cover image
CMOS DC-DC Converters aims to provide a comprehensive dissertation on the matter of monolithic inductive Direct-Current to Direct-Current (DC-DC) converters. For this purpose seven chapters are defined which will allow the designer to gain specific knowledge on the design and implementation of monolithic inductive DC-DC converters, starting from the very ...
Design and Implementation of Fully-Integrated Inductive DC-DC Converters in Standard CMOS
CMOS DC-DC Converters aims to provide a comprehensive dissertation on the matter of monolithic inductive Direct-Current to Direct-Current (DC-DC) converters. For this purpose seven chapters are defined which will allow the designer to gain specific knowledge on the design and implementation of monolithic inductive DC-DC converters, starting from the very basics.
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209.990000 USD

Design and Implementation of Fully-Integrated Inductive DC-DC Converters in Standard CMOS

by Michiel Steyaert, Mike Wens
Paperback / softback
Book cover image
CMOS Cellular Receiver Front-Ends: from Specification to Realization deals with the design of the receive path of a highly-integrated CMOS cellular transceiver for the GSM-1800 cellular system. The complete design trajectory is covered, starting from the documents describing the standard down to the systematic development of CMOS receiver ICs that ...
CMOS Cellular Receiver Front-Ends
CMOS Cellular Receiver Front-Ends: from Specification to Realization deals with the design of the receive path of a highly-integrated CMOS cellular transceiver for the GSM-1800 cellular system. The complete design trajectory is covered, starting from the documents describing the standard down to the systematic development of CMOS receiver ICs that comply to the standard. The design of CMOS receivers is tackled at all abstraction levels: from architecture level, via circuit level, down to the device level, and the other way around. The theoretical core of the book discusses the fundamental and more advanced aspects of RF CMOS design. It focuses specifically on all aspects of the design of high-performance CMOS low-noise amplifiers.
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167.990000 USD

CMOS Cellular Receiver Front-Ends

by Michiel Steyaert, Johan Janssens
Paperback / softback
Book cover image
CMOS Fractional-N Synthesizers starts with a comprehensive introduction to general frequency synthesis. Different architectures and synthesizer building blocks are discussed with their relative importance on synthesizer specifications. The process of synthesizer specification derivation is illustrated with the DCS-1800 standard as a general test case. The book tackles the design of ...
CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration
CMOS Fractional-N Synthesizers starts with a comprehensive introduction to general frequency synthesis. Different architectures and synthesizer building blocks are discussed with their relative importance on synthesizer specifications. The process of synthesizer specification derivation is illustrated with the DCS-1800 standard as a general test case. The book tackles the design of fractional-N synthesizers in CMOS on circuit level as well as system level. The circuit level focuses on high-speed prescaler design up to 12 GHz in CMOS and on fully integrated, low-phase-noise LC-VCO design. High-Q inductor integration and simulation in CMOS is elaborated and flicker noise minimization techniques are presented, ranging from bias point choice to noise filtering techniques. On a higher level, a systematic design strategy has been developed that trades off all noise contributions and fast dynamics for integrated capacitance (area). Moreover, a theoretical DeltaSigma phase noise analysis is presented, extended with a fast non-linear analysis method to accurately predict the influence of PLL non-linearities on the spectral purity of the DeltaSigma fractional-N frequency synthesizers.
https://magrudy-assets.storage.googleapis.com/9781441953438.jpg
367.490000 USD

CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration

by Michiel Steyaert, Bram de Muer
Paperback / softback
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